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arm-cortex-expert

Senior embedded software engineer specializing in firmware and driver development for ARM Cortex-M microcontrollers (Teensy, STM32, nRF52, SAMD).

1.19x
Quality

65%

Does it follow best practices?

Impact

93%

1.19x

Average score across 3 eval scenarios

SecuritybySnyk

Passed

No findings from the security scan

Fix and improve this skill with Tessl

tessl review fix ./plugins/AI-Agents-Safe-Coding-Skills/skills/arm-cortex-expert/SKILL.md

The canonical home for this skill is arm-cortex-expert in sickn33/agentic-awesome-skills

SKILL.md
Quality
Evals
Security

Quality

Content

50%Weight 40%Scale 1-5

Reviews the quality of instructions and guidance provided to agents. Good implementation is clear, handles edge cases, and produces reliable results.

The body delivers genuinely valuable, hard-to-recall expertise (M7 memory barriers, DMA cache-line alignment, W1C registers, per-platform gotchas) with concrete code, but it is padded with boilerplate filler and textbook Cortex-M concepts Claude already knows, its workflow lacks real verification checkpoints, and its only file reference is broken. Trimming known-concept sections, splitting platform detail into reference files, and fixing the dangling playbook reference would markedly improve it.

Suggestions

Delete the generic 'Use this skill when / Do not use this skill when / Instructions' boilerplate sections (their content is circular: 'Working on @arm-cortex-expert tasks') and remove the textbook Cortex-M material Claude already knows (architecture differences table, hardfault register basics, FPU lazy stacking, canary/watchdog basics) — this could cut roughly a third of the body while losing nothing.

Fix the dangling reference: either create `references/implementation-playbook.md` with the detailed examples it promises or remove the pointer; while doing so, move the per-platform gotchas and architecture detail into that reference file so SKILL.md stays a lean overview.

Make the Workflow's 'Validate' step a real verification checkpoint, e.g., 'Validate: compile for the target MCU (`arm-none-eabi-gcc -mcpu=cortex-m7 ...`) and confirm the example flashes/runs; if build fails, fix and recompile before optimizing,' and define the `mmio_read`/`mmio_write`/`safe_read_reg!` helpers the snippets depend on.

DimensionReasoningScore

Conciseness

Noticeably verbose with several padded or unnecessary sections: the circular boilerplate ('Working on @arm-cortex-expert tasks or workflows', 'The task is unrelated to @arm-cortex-expert'), plus textbook Cortex-M material Claude already knows — the architecture differences table, hardfault debugging basics (HFSR/CFSR/MMFAR), FPU lazy stacking, and stack canary/watchdog basics — together roughly a third of the ~295-line body. Not a 1 because substantial non-obvious material (M7 barrier/cache-coherency rules, W1C registers, per-platform gotchas) genuinely earns its place; not a 3 because the padding is not minor but whole sections.

2 / 5

Actionability

Mostly executable guidance: concrete C/C++ snippets (BASEPRI save/restore, W1C status write-back), Rust patterns (`#[link_section = ".dtcm"]`, `AtomicBool`/`Mutex<RefCell<...>>`), and named per-platform APIs (`SPI.beginTransaction`, `HAL_SPI_Transmit`, `nrfx_spi_xfer`). Not a 5 because key helpers are referenced but never defined (`mmio_read`/`mmio_write`, `safe_read_reg!`, `is_valid_mmio_address`) — snippets are fragments rather than copy-paste ready.

4 / 5

Workflow Clarity

The Workflow section lists a clear 6-step sequence (Clarify → Design → Implement → Validate → Optimize → Iterate), but validation checkpoints are missing or implicit: step 4 'Validate' actually describes producing example usage, not verifying correctness, and there is no compile/build/test-on-target check anywhere. Fits anchor 3 (steps present, checkpoints missing or implicit); a 4 would require actual verification steps such as 'compile for the target and flash to verify'.

3 / 5

Progressive Disclosure

The body has reasonable section structure, but all detailed content is inlined in one ~295-line SKILL.md (architecture table, fault debugging, per-platform gotchas are prime candidates for separate reference files), and its single pointer — 'open `resources/implementation-playbook.md`' — targets a file that does not exist in the bundle (no references/, scripts/, or assets/ directories). Fits anchor 3 (some structure, content that should be separate is inline, references not clearly signaled); not a 2 because the document is well-sectioned, not a headerless wall of text.

3 / 5

Total

12

/

20

Passed

Description

65%Weight 40%Scale 1-5

Based on the skill's description, can an agent find and select it at the right time? Clear, specific descriptions lead to better discovery.

A distinctive, domain-specific description with strong trigger keywords, but it answers only 'what' — there is no 'use when' trigger clause, and the capability statement is a single generic phrase ('firmware and driver development') rather than a list of concrete actions. Adding an explicit trigger clause and enumerating capabilities (peripheral drivers, DMA, RTOS integration) would raise it substantially.

Suggestions

Add an explicit 'Use when...' trigger clause, e.g., 'Use when writing or debugging firmware, bare-metal peripheral drivers, or ISRs for ARM Cortex-M boards (Teensy, STM32, nRF52, SAMD), or when the user mentions any of these platforms or an MCU part number.'

Replace the generic 'specializing in firmware and driver development' with concrete actions: 'Write peripheral drivers (I2C/SPI/UART/ADC/DMA), design HALs and interrupt-safe data pipelines, integrate FreeRTOS/Zephyr, and debug hardfaults' — this lifts both specificity and trigger coverage.

DimensionReasoningScore

Specificity

The description names the domain ('firmware and driver development for ARM Cortex-M microcontrollers') and enumerates concrete platforms '(Teensy, STM32, nRF52, SAMD)', but the stated actions are limited to the generic phrase 'firmware and driver development' — matching the anchor 'names domain and 1-2 concrete actions, but not comprehensive'. A 4 would require several specific actions (e.g., peripheral drivers, DMA, RTOS integration); a 2 would have only minimal or generic actions without the platform enumeration.

3 / 5

Completeness

The 'what' is clear (senior embedded engineer for firmware/driver development on the four named MCU families), but there is no 'Use when...' clause or equivalent explicit trigger guidance, which per the judging guidelines caps completeness at 3. Not a 4/5 because 'when' is entirely absent rather than merely implicit; not a 2 because the 'what' is specific, not vague.

3 / 5

Trigger Term Quality

Natural user keywords are present — 'firmware', 'driver', 'ARM Cortex-M', 'microcontroller', 'embedded', 'Teensy', 'STM32', 'nRF52', 'SAMD' — giving good coverage of terms users would plausibly say. Not a 5 because common variations users actually say are missing: specific part numbers (Teensy 4.1, STM32F4, nRF52840), 'bare-metal', 'FreeRTOS', 'Zephyr', 'Arduino', and protocols (SPI, I2C, USB).

4 / 5

Distinctiveness Conflict Risk

A clear niche — ARM Cortex-M firmware across four named platform families — with distinct triggers and minimal conflict risk; virtually no other skill category would claim 'Teensy, STM32, nRF52, SAMD firmware'. Sits at the anchor-5 example's level of niche specificity; a 4 would apply only if there were real overlap with a closely related skill (e.g., embedded Linux or general Arduino).

5 / 5

Total

15

/

20

Passed

Validation

93%

Checks the skill against the spec for correct structure and formatting. All validation checks must pass before discovery and implementation can be scored.

Validation — 15 / 16 Passed

Validation for skill structure

CriteriaDescriptionResult

frontmatter_unknown_keys

Unknown frontmatter key(s) found; consider removing or moving to metadata

Warning

Total

15

/

16

Passed

Repository

administrakt0r/AI-Agents-Safe-Coding-Skills

Path

plugins/AI-Agents-Safe-Coding-Skills/skills/arm-cortex-expert/SKILL.md

Reviewed

Table of Contents

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