arm-cortex-expert

Senior embedded software engineer specializing in firmware and driver development for ARM Cortex-M microcontrollers (Teensy, STM32, nRF52, SAMD). Decades of experience writing reliable, optimized, and maintainable embedded code with deep expertise in memory barriers, DMA/cache coherency, interrupt-driven I/O, and peripheral drivers.

Quality

68%

Does it follow best practices?

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Securityby

Passed

No findings from the security scan

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tessl review fix ./skills/arm-cortex-expert/SKILL.md

Quality

Content

65%

Reviews the quality of instructions and guidance provided to agents. Good implementation is clear, handles edge cases, and produces reliable results.

The body is highly actionable with concrete embedded code and platform-specific guidance, but it is verbose at the top, monolithic with no reference files, and the workflow lacks explicit validation checkpoints. Splitting reference material into bundle files and tightening the boilerplate would improve it.

Suggestions

Remove the generic boilerplate sections ('Use this skill when', 'Do not use this skill when', 'Instructions') that restate the skill name and add no signal.

Add explicit validation checkpoints to the workflow (e.g., 'After implementing the ISR, verify with a known transaction and check DMA buffer alignment before optimizing').

Move the architecture-difference table, platform gotchas, and hardfault debugging into separate reference files in ./references/ and link them one level deep from SKILL.md.

Dimension	Reasoning	Score
Conciseness	The dense technical core (barriers, DMA alignment, BASEPRI, W1C) earns its place, but it opens with generic boilerplate ('Working on @arm-cortex-expert tasks', 'Clarify goals, constraints') and explains some concepts Claude already knows, so it could be tightened.	2 / 3
Actionability	Provides concrete, executable C++/Rust snippets (mmio_read/write helpers, 32-byte aligned buffer attributes, BASEPRI masking, W1C status-clear, atomic/static patterns) with real addresses and platform-specific APIs.	3 / 3
Workflow Clarity	A 6-step design workflow is sequenced, but validation checkpoints are implicit or vague ('Validate → example usage + notes') with no validate→fix→retry loop for the risky cache/DMA operations.	2 / 3
Progressive Disclosure	No bundle files exist and all content sits inline in a ~300-line SKILL.md; sections are well-organized, but material that should be split out (architecture table, platform gotchas, hardfault debugging) is monolithic rather than referenced one level deep.	2 / 3
	Total	9 / 12 Passed

Description

72%

Based on the skill's description, can an agent find and select it at the right time? Clear, specific descriptions lead to better discovery.

The description is highly distinctive with strong, natural trigger terms and a clear niche, but it is persona-oriented and lacks an explicit 'when to use' trigger clause, capping completeness. Rewording it around concrete actions plus a 'Use when...' clause would raise specificity and completeness.

Suggestions

Add an explicit 'Use when...' trigger clause (e.g., 'Use when writing firmware or peripheral drivers for ARM Cortex-M MCUs like Teensy, STM32, nRF52, or SAMD').

Reframe the description around concrete actions instead of a persona — e.g., 'Writes and reviews firmware and peripheral drivers... configures DMA and cache coherency... implements ISRs and NVIC priorities'.

Drop the 'Decades of experience' credential phrasing; skills should describe capabilities, not résumé claims.

Dimension	Reasoning	Score
Specificity	Names the domain and concrete technical capabilities (memory barriers, DMA/cache coherency, interrupt-driven I/O, peripheral drivers), but it is framed as a persona ('Senior embedded software engineer') rather than a list of discrete actions, so it stops short of the 'multiple specific concrete actions' anchor.	2 / 3
Completeness	It clearly states what the skill covers, but there is no explicit 'Use when...' trigger clause, which per the guidelines caps completeness at 2.	2 / 3
Trigger Term Quality	Includes the exact natural keywords a user would say — 'Teensy, STM32, nRF52, SAMD', 'firmware', 'driver', 'DMA', 'memory barriers' — giving good coverage of real trigger terms.	3 / 3
Distinctiveness Conflict Risk	The specific MCU families and narrow expertise areas define a clear niche unlikely to overlap with other skills or trigger for the wrong skill.	3 / 3
	Total	10 / 12 Passed

Validation

93%

Warnings & errors only

Checks the skill against the spec for correct structure and formatting. All validation checks must pass before discovery and implementation can be scored.

Validation — 15 / 16 Passed

Validation for skill structure

Criteria	Description	Result
metadata_version	'metadata.version' is missing	Warning

	Total	15 / 16 Passed

Repository: rmyndharis/antigravity-skills
Path: skills/arm-cortex-expert/SKILL.md
Commit: e63f7dd

Reviewed: about 5 hours ago

Table of Contents

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