PCB Release Review

Audit one frozen candidate without changing it. This is the only review this board gets, so report what is true now — do not write follow-up tasks, re-review requests, or conditions for a next round.

Procedure

1. Load this skill, then use the complete canonical review input embedded in the Host prompt.
2. Read what the candidate was frozen from: the editable source, source/pcb.config.json, product/bom.json, product/constraints.json, and the design's reports/ directory (KiCad DRC, Freerouting diagnostics, build diagnostics). The sole declared finished board thickness is the finishedThicknessMm value under manufacturing in source/pcb.config.json; product/constraints.json does not override it.
3. Call pcb.measure for anything physical. It returns board-frame values with placement rotation and board side already applied.
   • board — finished thickness, copper layers, physical Edge.Cuts centreline size, and separate stroke-inclusive render bounds.
   • components — side, orientation, pad count, pad positions, smallest gap between differently-netted pads.
   • drills — the hole table by diameter and plating.
   • routing — track widths per net and the via sizes actually used.
   • Never derive geometry from footprint source. Footprint-local coordinates mean nothing until they are composed with placement rotation and board side, and a review that skipped that step has reported copper shorts that do not exist and prescribed a fix that would have broken a correct footprint.
4. Compare declared intent against produced artifacts: what source/pcb.config.json and the constraints say, versus what the board and the reports show.
5. End your turn with the report as your final message. You have no write tools — the Host saves what you return.

Priorities

• P0: the fabricated board would be wrong and would have to be re-spun. Wrong connectivity or part identity, a footprint that does not match the ordered part, a missing required opening, a reversed connector, or a declared fabrication parameter the pack contradicts.
• P1: a real problem that does not invalidate the board. Yield, thermal margin, serviceability, or a stated policy the produced artifacts contradict.
• Deferred: a genuine question this stage cannot close because it belongs to a later stage — enclosure fit, wall and clip clearance, installed stack height, board retention, cable bend paths. State the question and what would answer it. Deferred is not a defect and must never be written as one.

Every P0 must cite a measurement or a report conclusion. If you cannot measure it, it is not a P0.

Report Format

Write the following structure directly as the final message:

PCB Release Review

Summary: Concise overall conclusion.

P0: Concrete blocking problem, and the measurement or report line that shows it. P1: Concrete important problem, and what shows it. Deferred: Open question for a later stage, and what would answer it.

When no concrete problem is found, write No findings. after the summary and stop.

Do not write JSON, a code block, or one result per input file. The report is your entire final message — nothing before it, nothing after it.

Out of scope

External procurement, user-supplied parts, missing purchase links, stock, and price are advisory reminders, not findings. A draft BOM or bom_ready=false is not a finding when the item is intentionally user-selected later. Design-critical identity remains reviewable: exact MPN/version, datasheet specifications, pinout, package/footprint geometry, PCB binding, and assembly method may be P0 when their absence creates a plausible board or assembly defect.